AlazarTech has developed a complete FPGA based Fast Fourier Transform (FFT) engine for use in applications such as Optical Coherence Tomography (OCT).
On-FPGA FFT is presently available on ATS9373, ATS9360, ATS9371, ATS9350 and ATS9351.
The main advantage of performing FFT calculations in the on-board FPGA is that it virtually eliminates the downstream signal processing bottleneck. Users no longer have to use a powerful CPU or even a power-hungry GPU to perform FFT.
Users are allowed to download a complex window function that is multiplied with the time-domain data prior to doing FFT calculations. A complex window function allows users to combine a window function (typically a real function) with a complex Dispersion Compensation Function for their specific optical system.
The output from the on-FPGA FFT module is the amplitude of the FFT or its logarithmic value. Output data format can either be single-precision floating point or 32, 16 or 8 bit integer. All of this is user programmable using high level API calls. No FPGA design is necessary.
FFT length is also user-programmable up a maximum of 4096 points for ATS9373, ATS9360 and ATS9371, and 2048 for ATS9350 and ATS9351. Users are allowed to choose shorter lengths, as long as they are powers-of-2, e.g. 1024 or 512.
It is also possible for On-FPGA FFT to output both FFT data and time-domain data. This is very useful for users to validate AlazarTech’s FFT output by comparing against their own calculation done on the time domain data.
On-FPGA FFT is fully supported by ATS-SDK, which includes example programs for various programming environments, showing how to setup and collect FFT data.
The Pre-FFT Module consists of data buffering, zero-padding (if necessary) and multiplication of ADC data with a complex window function.
This module detects if the number of data points being supplied for each trigger is a power-of-2 or not. If not, data is zero-padded until the next power of 2. For example, if a laser can only provide 1352 valid data points per trigger, data will be zero-padded between 1353 and 2048 points, so a 2048 point FFT can be run.
Before starting the acquisition, user would have downloaded a window function. AlazarTech API supports generation of most commonly used window functions. Note that window function length must be the same as the number of good data point, i.e. 1352 in the case above.
If users want to use a Dispersion Compensation Function, they must first create this complex function (based on their specific requirements), then multiply it with the window function before downloading it into the board using the appropriate API call.
The output of the Pre-FFT module is a 12-bit complex vector that is input to the FFT module for downstream calculations.
PRE-FFT MODULE BLOCK DIAGRAM CLICK TO ENLARGE IMAGE
The FFT module implements an integer based Fast Fourier Transform algorithm using FPGA resources (logic, multipliers and memory).
It should be noted that even though input data is 12 bits wide, FFT output comes out with a bit width of 26 bits. This bit growth is a result of various multiplications that take place during FFT calculation.
Following are the maximum rates at which on-FPGA FFT can operate:
||FFT CALCULATIONS PER SECOND
||1,000,000 x 4096 point FFT
||250,000 x 4096 point FFT
||200,000 x 4096 point FFT
||250,000 x 4096 point FFT
||100,000 x 2048 point FFT
||100,000 x 2048 point FFT
The flexible and fully programmable Post-FFT Module makes the on-FPGA FFT engine very easy to use.
The most basic function performed by Post-FFT Module is calculation of the amplitude. This step involves multiplying two 26-bit integers, resulting a bit width of 52 bits.
This 52-bit integer is then converted to single-precision floating point format. This is called the LINEAR AMPLITUDE. Next, we calculate the logarithmic value of this floating point amplitude. This is called LOG AMPLITUDE.
Some customers do not want to use floating point data in their systems. Post-FFT module has built-in bit-slicers that can scale the LINEAR or LOG amplitude vectors to be U32, U16 or even U8. The bit-slicers are user programmable, allowing advanced programmers to effectively apply digital gain to the amplitude output.
POST-FFT MODULE BLOCK DIAGRAM CLICK TO ENLARGE IMAGE
On_FPGA FFT brings an additional feature to AlazarTech digitizers. It is possible to append a 512 bit NPT Footer to each record. An NPT Footer contains a great deal of useful data, such as time stamp, a sequential record number and, most importantly for OCT customers, a Frame Count value.
Frame Count can be very useful for users whose frames may not always be of the same size, e.g. if the imaging system contains a servo motor whose speed is not constant, the number of lines (triggers) per revolution will vary from frame to frame.
If user connects a Frame Start signal to the AUX I/O connector, On-FPGA FFT will increment a counter each time this Frame Start signal toggles, resulting in a Frame Count value. This Frame Count value is included in each NPT Footer, so user software can tell which line belongs to which frame.
DEALING WITH BAD K-CLOCKS
In order to maintain the highest possible FFT calculation rate, it is essential that each trigger actually be captured. While this sounds simple, it can be be problematic with lasers whose k-clock is too slow in between the scans.
If the clock is too slow, the AlazarTech board may not get enough clock edges to satisfy its re-arm time (specified in ADC sampling clock cycles). If the board has not re-armed, it will not be able to accept the next trigger, causing the next line to be missed.
In such cases, we recommend that users take advantage of the new OCT Ignore Bad Clock technology introduced simultaneously with On-FPGA FFT technology.
By ignoring the bad (out of specification) clocks in an OCT setup, AlazarTech waveform digitizer will be able to re-arm itself rapidly and not miss any data.
ATS-SDK SUPPORT FOR ON-FPGA FFT
ATS-SDK includes example programs on how to use this on-FPGA FFT technology.
Users should use the example program, NPT_on-FPGA_FFT, as the starting point for their software development.