Software-selectable decimation factor (1 to 100,000)
50 Ohm input impedance for AC signals
10 kiloOhm input impedance for DC
ATS9130: External Clock Upgrade
While the ATS9130 features a 10 MHz TCXO as the source of the timebase system, there may be occasions when digitizing has to be synchronized to an external clock source. ATS9130 External Clock option provides an SMA input for an external clock signal with a frequency between 50 MHz and 1 MHz.
Fast External Clock
A new sample is taken by the on-board ADCs for each rising edge of this External Clock signal. Fast External Clock frequency must always be higher than 1 MHz and lower than 50 MHz in order to satisfy the clocking requirements of the ADC chips being used.
10 MHz Reference Clock
It is possible to generate the sampling clock based on an external 10 MHz reference input. ATS9130 uses an on-FPGA low-jitter PLL to generate the 50 MHz clock used by the ADC.
Users can also set a decimation factor for the external clock. For example, if the user wants to digitize the input signal on every tenth clock edge, this factor can be set to 10. Minimum decimation value is 1 and maximum is 100,000.