This optional upgrade allows ATS9350 to perform analog to digital conversion based on an external clock signal. There are 3 supported types of External Clock:
Fast External Clock
A new sample is taken by the on-board ADCs for each rising edge of this External Clock signal. Fast External Clock frequency must always be higher than 2 MHz and lower than 500 MHz in order to satisfy the clocking requirements of the ADC chips being used.
Slow External Clock
This type of clock should be used when the clock frequency is either too slow or is a burst-type clock. In this mode, the ATS9350 ADCs are run at a preset internal clock frequency. The user-supplied Slow External Clock signal is then monitored for low-to-high transitions. Each time there is such a transition, a new sample is stored into the onboard memory.
10 MHz Reference Clock
It is possible to generate the sampling clock based on an external 10 MHz reference input. ATS9350 uses an on-board low-jitter VCO to generate the 500 MHz high frequency clock used by the ADC. This 500 MHz sampling clock can then be decimated by a factor of 1, 2, 5, 10 or any other integer value that is divisible by 5.
ATS9350 External Clock Upgrade allows you to supply the ADC clock. This option is extremely important in many RF applications in which phase measurements must be made between the inputs themselves or between the inputs and an external event. One of the supported External Clock modes is 10 MHz Reference Clock mode, which is useful for RF systems that use a common 10 MHz reference clock. The Fast External Clock mode is the ideal clocking scheme for OCT applications.