This optional upgrade allows ATS9462 to perform analog to digital conversion based on an external clock signal. There are 3 supported types of External Clock:
Fast External Clock
A new sample is taken by the on-board ADCs for each rising (or falling) edge of this External Clock signal. In order to operate the ADC under optimal conditions, the user must set the appropriate frequency range for the external clock being supplied. The following ranges are supported:
External Clock: 1 MHz < fEXT < 180 MHz
The active edge of the external clock is software selectable between the rising or falling edge.
Slow External Clock
Users can select Slow External Clock if the external clock frequency is less than 1 MHz. Note that Slow External Clock signal must be a 3.3 Volt TTL signal. In this mode, the on-board ADCs are run at a fixed 125 MS/s sample rate. Each time a rising (or falling) edge is detected on the external clock signal, one sample is stored. Thus, there can be zero to 8 ns skew between the clock edge and the actual sampling of the signal. This skew can change from sample to sample, so this type of clock should be used only if this jitter is acceptable in your application.
10 MHz Reference Clock
It is possible to generate the sampling clock based on an external 10 MHz reference input. ATS9462 uses an on-board PLL to generate the high frequency clock. Clock frequencies in the range of 150 MHz to 180 MHz can be generated with a 1 MHz resolution.
ATS9462 External Clock Upgrade allows you to supply the ADC clock. This option is extremely important in many RF applications in which phase measurements must be made between the inputs themselves or between the inputs and an external event. One of the supported External Clock modes is 10 MHz Reference Clock mode, which is useful for RF systems that use a common 10 MHz reference clock.