This file lists all important changes to ATS9352 Firmware
[20.04] - 2023-05-03
Increased the maximum FFT rate from 100.1 kHz to 105 kHz for the optional FFT module.
[20.03] - 2023-02-23
Fixed a bug that could cause acquisition to stall with certain values of pre-trigger data in NPT acquisition mode.
Changed power-on reset values of RESETn and PDn signals for on-board clock IC. In certain computers with irregular power sequencing, ADC clocks were being initialized incorrectly after computer was first powered on (acquired data showed glitches). A computer restart was required to make ADC clocking work correctly. Now, clocks are always functional in all computers.
[15.05] - 2021-03-10
Fixed timing issues in v15.04 that caused intermittent stalling of acquisition.
[15.04] - 2021-01-20
Added support for getting data buffers with interleaved data. This is mainly for compatibility with ATS9350 code.
Fixed a bug where DMA would stall if 100 mV range was selected.
[14.01] - 2020-09-24
Fixed a bug where CH B data was corrupted after 2^^29 samples.
[12.11] - 2020-06-10
Fixed a bug where AUX I/O Trigger Enable (Frame Trigger) was not working correctly.
[12.10] - 2020-02-27
Added high performance NPT, Traditional mode and Continuous streaming AutoDMA using MultiPort logic.
[11.09] - 2019-12-09