Also added NPT footer capability in 12-bit packed mode for dual channel acquisition.
[31.09] - 2019-09-26
Fixed bug whereby overflow was not reported and data was allowed to be written into VFIFO even after an overflow, causing recording of corrupt lossy data.
[31.08] - 2019-05-28
Added capability to do infinite buffers per trigger enable.
Added FIFO overflow bit to Reg_07.
Uses FFT v5.5 that supports 250 kHz trigger rate.
Improved PCIe signal conditioning.
Added NPT footer support in 12 bit packed mode.
[30.04] - 2018-09-17
Fixes a bug in V30.03, whereby the FPGA version number was reported as 29.02.
[30.03] - 2018-08-30
Uses FFT v5.2 that allows 250kHz trigger rate in RAW+FFT (as opposed to 200kHz) and also fixes a bug in REAL_ONLY and IMAG_ONLY outputs.
[28.08] - 2017-03-18